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PD-97530A
IRUH330118AK Radiation Hardended Ultra Low Dropout IRUH330118AP Fixed Positive Linear Regulator +3.3VIN to +1.8VOUT @3.0A
Product Summary
Part Number
IRUH330118AK IRUH330118AP
IO
3.0A
VIN
3.3V
VOUT
1.8V
8-LEAD FLAT PACK
Description
The IRUH330118 is a space qualified, ultra low dropout linear regulator designed specifically for applications requiring high reliability, low noise and radiation hardness.
Features
n Silicon On Insulator (SOI) CMOS Regulator
n n n n n n n n n n
Absolute Maximum Ratings
Parameter
Power Dissipation @ TC = 125C Maximum Output Current @ Maximum Power Dissipation with no Derating Non-Operating Input Voltage Operating Input Voltage Ground Shutdown Pin Voltage Output Pin Voltage Operating Case Temperature Range Storage Temperature Range Maximmum Junction Temperature Lead Temperature (Soldering 10sec) Pass Transistor Thermal Resistance, Junction to Case PD IO VIN VIN GND VSHDN VOUT TO TS TJ TL RTHJC
IC, CMOS Latch-Up Immune, Inherently Rad Hard Total Dose Capability up to 300Krads(Si) (Condition A); Tested to 500Krad (Si) ELDRS up to 100Krad(Si) (Condition D) SEU Immune up to LET = 80 MeV*cm2/mg Space Level Screened Fast Transient Response Timed Latch-Off Over-Current Protection Internal Thermal Protection On/Off Control via Shutdown Pin, Power Sequencing Easily Implemented Isolated Hermetic 8-Lead Flat Pack Ensures Higher Reliability This part is also available in MO-078 Package as IRUH330118BK / IRUH330118BP
Min.
-0.3 2.9 -0.3 -0.3 -0.3 -55 -65 -
Symbol
Max.
25 See Fig 4 +8.0 6.4 0.3 VIN + 0.3 VIN + 0.3 +140 +150 +150 +300 1.0
Units
W A
V
C
C/W
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IRUH330118AK IRUH330118AP
Electrical Characteristics c Pre-Radiation @TC = 25C, VIN = 3.3V (Unless Otherwise Specified)
Parameter Test Conditions
2.8V VIN 3.8V, 50mA IOUT 3.0A Output Voltage 2.8V VIN 3.8V, 50mA IOUT 3.0A, -55C to +125C 2.8V VIN 3.8V, 50mA IOUT 3.0A, Post -Rad Current Limit Over-Current Time-to-Latch Maximum Shutdown Temp.d Ripple Rejectiond Temp. Coefficient of Output Voltage VSENSE Pin Current Threshold Voltage Maximum SHDN Pin "Off" Threshold Voltage Output Voltage at Shutdown SHDN Pin Leakage Current SHDN Pin Pull-Up Current F= 120Hz, IO = 50mA, -55C to +125C F= 120Hz, IO = 50mA, Post -Rad -55C to +125C Over-Current Latching, -55C to +125C, Post -Rad IO > ILATCH ILATCH tLATCH TLATCH PSRR VOUT_TEMPCO ISENSE VSHDN VSHDN VOUT ISHDN ISHDN VT-POR IQ VOUT
Symbol
Min.
1.773 1.728 1.755 3.5 125 65 40 1.2 -0.1 -10 -98 -140 -98 -
Typ. Max. Units
1.8 1.8 1.8 10 140 -0.025 1.6 1.7 1.827 1.872 1.836 0.8 0.1 10 -56 -30 -56 15 90 V mA A A ms C dB % / C mA V V V A V
dA
d
-55C to +125C ISOURCE = 200A, -55C to +125C Post -Rad ISOURCE = 200A, -55C to +125C Post -Rad RLOAD = 36 Ohms, VSHDN = 3.3V
Minimum SHDN Pin "On"
d
-55C to +125C, Post-Rad VSHDN = 3.3V, -55C to +125C,Post-Rad VSHDN = 0.4V VSHDN = 0.4V, -55C to +125C VSHDN = 0.4V, Post-Rad Sweep VIN and Measure Output No Load Full Load
d Power On Reset Threshold d Quiescent Current d
Notes:
Connected as shown in Fig.1 and measured at the junction of VOUT and VSENSE Pins. Under normal closed-loop operation. Guaranteed by design. Not tested in production.
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IRUH330118AK IRUH330118AP
Radiation Performance Characteristics
Test
Total Ionizing Dose (Gamma)
Conditions
MIL-STD-883, Method 1019 (Condition A) Operating Bias applied during exposure Minimum Rated Load, Vin = 6.4V MIL-STD-883, Method 1019 (Condition D)
Min
300
Typ
500
Unit
Krads (Si)
c d
Total Ionizing Dose (Gamma) Single Event effects SEU, SEL, SEGR, SEB
(ELDRS) Operating Bias applied during exposure Minimum Rated Load, Vin = 6.4V Heavy Ions (LET) Operating Bias applied during exposure under varying operating conditions
100
See
Krads (Si)
84
MeV*cm /mg
2
Neutron Fluence
MIL-STD-883, Method 1017
1.0e
11
Neutrons/cm
2
Notes:
Tested to 500Krad (Si). See Fig. 5.
Space Level Screening Requirements
TEST/INSPECTION SCREENING LEVEL
SPACE Nondestructive Bond Pull Internal Visual Seal Temperature Cycle Constant Acceleration Mechanical Shock PIND Pre Burn-In-Electrical Burn-In Final Electrical Radiographic External Visual 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 100% 2012 2009 1015
MIL-STD-883
METHOD 2023 2017 1014 1010 2001 2002 2020
Notes:
International Rectifier does not currently have a DSCC certified Radation Hardness Assurance Program.
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IRUH330118AK IRUH330118AP Application Information
Input Voltage 0.1uF and 1uF Ceramic; Two 100uF Low ESR Tantalum VIN VOUT Output Voltage 0.1uF and 1uF Ceramic; Two 100uF Low ESR Tantalum
IRUH3301xxxx SHDN GND
V SENSE
Fig. 1. Typical Regulator Circuit; Note the SHDN Pin is hardwired in the "ON" position.
The VSENSE Pin is connected as noted in the "General Layout Rules" section.
Over-Current & Over-Temperature Protection
The IRUH3301 series provides over-current protection by means of a timed latch function. Drive current to the internal PNP pass transistor is limited by an internal resistor (Rb in Fig. 3) between the base of the transistor and the control IC drive FET. If an over-current condition forces the voltage across this resistor to exceed 0.5V (nom), the latch feature will be triggered. The time-tolatch (tLATCH) is nominally 10ms. If the over-current condition exists for less than tLATCH , the latch will not be set. If the latch is set the drive current to the PNP pass transistor will be disabled. The latch will remain set until one of the following actions occur: 1. The SHDN Pin voltage is brought above 1.2V and then lowered below 0.8V. 2. The VIN Pin voltage is lowered below 1.7V. If the junction temperature of the regulator IC exceeds 140C nominal, the thermal shutdown circuit will set the internal latch and disable the drive current to the PNP pass transistor as described above. After the junction temperature falls below a nominal 125C, the latch can be reset using either of the actions described above.
Under-Voltage Lock-Out
The under-voltage lock-out (UVLO) function prevents operation when VIN is less than 1.7V (nominal). There is a nominal 100mV hysteresis about this point.
Input Voltage Range
The device functions fully when VIN is greater than 2.8V. It enters into under-voltage lock-out at VIN < 1.7V (nominal). When 1.7V (nominal) < VIN < 2.8V, VOUT will track VIN and overshoot may occur. A larger output capacitor should be used to slow down the VOUT rise rate for slow VIN ramp applications.
Shutdown (SHDN)
The regulator can be shutdown by applying a voltage of >1.2V to the SHDN Pin. The regulator will restart when the SHDN Pin is pulled below the shutdown threshold of 0.8V. If the remote shutdown feature is not required, the SHDN Pin should be connected to GND.
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Input Capacitance
Input bypass capacitors: Two (0.1F and 1F) ceramics and two 100F low ESR tantalums (AVX TPS or equivalent), placed very close to the VIN Pin are required for proper operation. When the input voltage supply capacitance is more than 4 inches from the device, additional input capacitance is recommended. Larger input capacitor values will improve ripple rejection further improving the integrity of the output voltage.
Output Capacitance
Output bypass capacitors: Two (0.1F and 1F) ceramics and two 100F low ESR tantalums (AVX TPS or equivalent) are required for loop stability. Faster transient performance can be achieved with multiple additional 1F ceramic capacitors. Ceramic capacitors greater than 1F in value are not recommended as they can cause stability issues. Tantalum capacitor values larger than the suggested value are recommended to improve the transient response under large load current changes. The upper capacitance value limit is governed by the delayed over-current latch function of the regulator and can be as much as 10,000F without causing the device to latch-off during start-up.
General Layout Rules
Low impedance connections between the regulator output and load are essential. Solid power and ground planes are highly recommended. In those cases where the board impedances are not kept very small, oscillations can occur due to the effect of parasitic series resistance and inductance on loop bandwidth and phase margin. The VSENSE Pin must be connected directly to the VOUT Pin using as short a trace as possible with the connection inside the first bypass capacitor (see Fig. 2a). Connect ceramic output capacitors directly across the VOUT and GND Pins with as wide a trace as design rules allow (see Fig. 2a). Avoid the use of vias for these capacitors and avoid loops. Fig.2 shows the ceramic capacitors tied directly to the regulator output. The input capacitors should be connected as close a possible to the VIN Pin.
Fig. 2a. Layer 1 conductor.
Ground plane below layer 1
Fig. 2b. Layer 1 silkscreen 5
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IRUH330118AK IRUH330118AP
VSENSE VIN Input Undervoltage detect SHDN Thermal Shutdown Shutdown & Over Current Latch Rb Disable Error Amp + VREF VOUT
Latch Timing capacitor
GND
Fig. 3. Simplified Schematic Circuit
Maximum Output Current (A) with no derating at Maximum Dissipation
4.0 3.5
Output Current (A)
3.0 2.5 2.0 1.5 1.0 0.5 0.0 100 110 120 130 140 150 160 170
Mounting Surface Temperature ('C)
Fig. 4. Maximum Output Current versus Mounting Surface Temperature with no Derating at Maximum
Dissipation
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VOut
0.500% Delta-VOut (%) 0.250% 0.000% -0.250% -0.500% 1 10 100 1000 10000 100000 Total Dose (Rad (Si)) ELDRS TID
Fig. 5. Change in Output Voltage vs. Total Ionizing Dose Radiation Exposure at Both High and Low Dose Rates
PSRR (Typical)
105 95 85 75 65 55 45 35 25 15 5 -5 0.1 1 10 Freq (KHz)
Recomended Setup without Part Iout=100mA & 1.6A, 1.8Vout, 3.3Vin
PSRR (dB)
100
1000
10000
Fig. 6. Typical Power Supply Ripple Rejection at 100mA and 1.6A using recommended layout
and capacitors. Results above 10KHz are influenced by testing setup and layout.
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IRUH330118AK IRUH330118AP Fig 7. Case Outline and Dimensions - 8-Lead Flat Pack (Lead Form Down)
Pin Assignment
Pin # 1 2 3 4 5 6 7 8 Pin Description GND GND SHUTDOWN VSENSE VOUT VOUT VIN VIN
Note: 1) All dimensions are in inches
Warning: This Product contains BeO
Fig 8. Case Outline and Dimensions - 8-Lead Flat Pack (Lead Trimmed)
Pin Assignment
Pin # 1 2 3 4 5 6 7 8 Pin Description GND GND SHUTDOWN VSENSE VOUT VOUT VIN VIN
Note: 1) All dimensions are in inches
Warning: This Product contains BeO
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Part Numbering Nomenclature
IR U H3 301 18 A K
Linear Regulator
U = Ultra Low Dropout Regulator
Lead Form Options
Blank = Lead Form Down (Fig. 7) B = Lead Form Up C = Lead Trimmed (Fig. 8)
Radiation Hardening
Blank = No Rad Tolerance H3 = 300 Krads
Screening Level
P = Unscreened. 25 deg C Electrical Test Not for Qualification H = Class H per MIL-PRF-38534 K = Class K per MIL-PRF-38534
Device indicator
301 = 3 Amp Positive Regulator
Output Voltage
18 = 1.8V 25 = 2.5V 33 = 3.3V A1 = Adjustable Optimized for 3.3 V Input A2 = Adjustable Optimized for 5.0V Input
Package Type
A = 8 Lead Flat Pack
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 08/2010
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